Question
No: 1 ( Marks: 1 ) - Please choose one
A SOP expression is equal to 1
______________
► All the variables in
domain of expression are present
► At least one variable
in domain of expression is present.
► When one or more
product terms in the expression are equal to 0.
► When one or more product terms in the
expression are equal to 1. (Page 86)
Question
No: 2 ( Marks: 1 ) - Please choose one
The output A < B is set to 1 when the
input combinations is __________
► A=10, B=01
► A=11, B=01
► A=01, B=01
► A=01, B=10 (Page
109)
Question
No: 3 ( Marks: 1 ) - Please choose one
Two 2-bit comparator
circuits can be connected to form single 4-bit comparator
► True (Page
154)
► False
Question
No: 4 ( Marks: 1 ) - Please choose one
High level Noise Margins (VNH) of CMOS 5 volt
series circuits is _____________
► 0.3 V
► 0.5 V
► 0.9 V (Page 65)
► 3.3 V
Question
No: 5 ( Marks: 1 ) - Please choose one
If we multiply “723”
and “34” by representing them in floating point notation i.e. by first,
converting them in
floating point
representation and then multiplying them, the value of mantissa of result will
be ________
► 24.582 (But
not sure)
► 2.4582
► 24582
► 0.24582
Question
No: 6 ( Marks: 1 ) - Please choose one
The output of the
expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟
here
represents OR Gate.
► Undefined
► One
► Zero
► 10 (binary)
Question
No: 7 ( Marks: 1 ) - Please choose one
If an active-HIGH S-R latch has a 0 on
the S input and a 1 on the R input and then the R input goes to 0, the latch
will be
________.
► SET (page 220)
► RESET
► Clear
► Invalid
Question
No: 8 ( Marks: 1 ) - Please choose one
3.3 v CMOS series is characterized by
__________ and _________as compared to the 5 v CMOS series.
► Low switching speeds,
high power dissipation
► Fast switching
speeds, high power dissipation
► Fast switching speeds, very low power
dissipation (page61)
► Low switching speeds,
very low power dissipation
Question
No: 9 ( Marks: 1 ) - Please choose one
The binary value “1010110”
is equivalent to decimal __________
► 86 (According to Formula)
► 87
► 88
► 89
Question
No: 10 ( Marks: 1 ) - Please choose one
The _______ Encoder is used as a keypad
encoder.
► 2-to-8 encoder
► 4-to-16 encoder
► BCD-to-Decimal
► Decimal-to-BCD Priority (Page 166)
Question
No: 11 ( Marks: 1 ) - Please choose one
How many data select
lines are required for selecting eight inputs?
► 1
► 2
► 3 click here for
detail
► 4
Question
No: 12 ( Marks: 1 ) - Please choose one
NOT
Gate
level
AND
Gate
level
OR Gate
level
the diagram above
shows the general implementation of ________ form
► boolean
► arbitrary
► POS
► SOP
Question
No: 13 ( Marks: 1 ) - Please choose one
The Quad Multiplexer has _____ outputs
► 4 (Page 217)
► 8
► 12
► 16
Question
No: 14 ( Marks: 1 ) - Please choose one
Demultiplexer has
► Single input and
single outputs.
► Multiple inputs and
multiple outputs.
► Single input and multiple outputs. (Page
178)
► Multiple inputs and
single output.
Question
No: 15 ( Marks: 1 ) - Please choose one
The expression _________ is an example
of Commutative Law for Multiplication.
► AB+C = A+BC
► A(B+C) = B(A+C)
► AB=BA (Page 72)
► A+B=B+A
Question
No: 16 ( Marks: 1 ) - Please choose one
"Sum-of-Weights"
method is used __________
► to convert from one number system to
other (Page 14)
► to encode data
► to decode data
► to convert from
serial to parralel data
MIDTERM
EXAMINATION
Spring
2010
Question
No: 1 ( Marks: 1 ) - Please choose one
The maximum number
that can be represented using unsigned octal system is _______
► 1
► 7 (Page 31)
► 9
► 16
Question
No: 2 ( Marks: 1 ) - Please choose one
If we add “723” and “134”
by representing them in floating point notation i.e. by first, converting them
in
floating point
representation and then adding them, the value of exponent of result will be
________
► 0
► 1
► 2 (Page 26 )
► 3
Question
No: 3 ( Marks: 1 ) - Please choose one
The diagram given
below represents __________
► Demorgans law
► Associative law
► Product of sum form (According to rule of
theorem)
► Sum of product form
Question
No: 4 ( Marks: 1 ) - Please choose one
The range of Excess-8
code is from ______ to ______
► +7 to -8 (Page
34)
► +8 to -7
► +9 to -8
► -9 to +8
Question
No: 5 ( Marks: 1 ) - Please choose one
A non-standard POS is converted into a
standard POS by using the rule _____
►
►
AA = 0 (Page 85)
►
► A+B = B+A
Question
No: 6 ( Marks: 1 ) - Please choose one
The 3-variable Karnaugh Map (K-Map) has
_______ cells for min or max terms
► 4
► 8 (Page 89)
► 12
► 16
Question
No: 7 ( Marks: 1 ) - Please choose one
The binary numbers A
= 1100 and B = 1001 are applied to the inputs of a comparator. What are the
output
levels?
► A > B = 1, A < B = 0, A < B = 1
► A > B = 0, A
< B = 1, A = B = 0
► A > B = 1, A < B = 0, A = B = 0
(Page 109)
► A > B = 0, A
< B = 1, A = B = 1
Question
No: 8 ( Marks: 1 ) - Please choose one
A particular Full
Adder has
► 3 inputs and 2 output (Page 135)
► 3 inputs and 3
output
► 2 inputs and 3
output
► 2 inputs and 2
output
Question
No: 9 ( Marks: 1 ) - Please choose one
The function to be
performed by the processor is selected by set of inputs known as ________
► Function Select Inputs (Page 147)
► MicroOperation
selectors
► OPCODE Selectors
► None of given
option
Question
No: 10 ( Marks: 1 ) - Please choose one
For a 3-to-8 decoder how many 2-to-4
decoders will be required?
► 2 (Page 160)
► 1
► 3
► 4
Question
No: 11 ( Marks: 1 ) - Please choose one
GAL is an acronym for ________.
► Giant Array Logic
► General Array Logic (Page 183)
► Generic Array Logic
► Generic Analysis
Logic
Question
No: 12 ( Marks: 1 ) - Please choose one
The Quad Multiplexer has _____ outputs
► 4 (Page 216)
► 8
► 12
► 16
Question
No: 13 ( Marks: 1 ) - Please choose one
A.(B.C) = (A.B).C is an expression of
__________
► Demorgan‟s Law
► Distributive Law
► Commutative Law
► Associative Law (Page 72)
Question
No: 14 ( Marks: 1 ) - Please choose one
2's complement of any
binary number can be calculated by
► adding 1's
complement twice
► adding 1 to 1's complement (Page 144)
► subtracting 1 from
1's complement.
► calculating 1's
complement and inverting Most significant bit
Question
No: 15 ( Marks: 1 ) - Please choose one
The binary value “1010110”
is equivalent to decimal __________
► 86 (According to formula)
► 87
► 88
► 89
Question
No: 16 ( Marks: 1 ) - Please choose one
Tri-State Buffer is basically a/an
_________ gate.
► AND
► OR
► NOT
► XOR (Page 186)
MIDTERM
EXAMINATION 2010
1. The binary value “11011” is equivalent to
__________
►1B (According to
rule)
►1C
►1D
►1E
2.
An important application of AND Gate is its use in counter circuit
►True (Page 281)
►False
3.
The OR Gate performs a Boolean _______ function
►Addition (Page 42)
►Subtraction
►Multiplication
►Division
4.
TTL based devices work with a dc supply of ____ Volts
►+10
►+5
(Page 61)
►+3
►3.3
5. A
standard POS form has __________ terms that have all the variables in the
domain of the
expression.
►Sum
(Page 85)
►Product
►Min
►Composite
6. A
SOP expression having a domain of 3 variables will have a truth table having
____
combinations
of inputs and corresponding output values.
►2
►4
►8
(According to rule)
►16
7. A
BCD to 7-Segment decoder has
►3 inputs and 7
outputs
►4
inputs and 7 outputs (Page 103)
►7 inputs and 3
outputs
► inputs and 4
outputs
8.
In the Karnaugh map shown above, which of the loops shown represents a legal
grouping?
►A
►
►C click
here for detail
►D
9.
The binary value of 1010 is converted to the product term
►True
►False
10.
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a
comparator. What are
the
output levels?
►A > B = 1, A <
B = 0, A < B = 1
►A > B = 0, A <
B = 1, A = B = 0
►A
> B = 1, A < B = 0, A = B = 0 (Page 109)
►A > B = 0, A <
B = 1, A = B = 1
11.
( ) 1 3 2
1 C S S S out + +
is
boolean expression for
►Half Adder
►Full Adder
►The
Invalid BCD Detector Circuit (page 142)
►Parity Checker
12.
3-to-8 decoder can be used to implement Standard SOP and POS Boolean
expressions
►True
(Page 160)
►False
13.
The device shown here is most likely a _______
►Comparator
►Multiplexer
►Demultiplexer
click here for detail
►Parity generator
14.
The GAL22V10 has ____ inputs
►22
(Page 195)
►10
►44
►20
15.
A latch retains the state unless
►Power is turned off
►Input
is changed (page 218)
►Output is changed
►Clock pulse is
changed
16.
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and
then the R input
goes
to 0, the latch will be ________.
►SET
(Page 220)
►RESET
►Clear
►Invalid
17.
Consider a circuit consisting of two consecutive NOT gates, the entire circuit
belongs to a CMOS
5
Volt series, if certain voltage is applied on the input, the output voltage of
Logic high signal
(VoH)
will be in the range of _______ volts.
►4 to 4.5
►4.5
to 5
►0 to 4.5
►0 to 3.5
18.
A.(B.C) = (A.B).C is an expression of __________
►Demorgan‟s Law
►Distributive Law
►Commutative Law
►Associative
Law (Page 72)
19.
The 4-bit 2’s complement
representation of “+5” is _____________
►1010
►1110
►1011
►0101
20.
Which of the number is not a representative of hexadecimal system
►1234
►ABCD
►1001
►DEHF Hexa
does not have H as remainder
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